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Perfecting RF CMOS: How Peregrine Pioneered RF SOI

on October 30, 2013 from 5:30 PM to 8:30 PM

Speaker Ron Reedy Co-Founder and CTO, Peregrine Semiconductor
Topic Info

Gallium Arsenide, GaAs, was developed over 40 years primarily for military RF applications. Blessed with high mobility and an insulating substrate, RF analog performance was excellent but manufacturing issues and lack of low power digital options created long term issues. With cellular phone growth in the late 1980’s, RF markets required higher levels of integration and more robust supply chains, leading to Peregrine Semiconductor’s founding specifically to offer CMOS solutions to high performance RF markets.

In 1988 key researchers published results that clearly showed a new form of CMOS SOI had been demonstrated. Simultaneously I started preparing initial business plans that lead to founding the company on the premise that cellular phones would require integrated RF solutions just as personal computers required integrated digital solutions. Driven by integration and cost, we believed that a CMOS solution would dominate this opportunity and a CMOS technology on an RF (insulating) substrate would be the ideal solution. Skepticism was rampant that such a vision was anything but crazy.

Twenty five years later, Peregrine is an overnight success and about to ship its two billionth RF CMOS SOI RFIC. In this presentation, the history of technical, product, business and financial hurdles will be discussed. Active resistance of existing GaAs suppliers will be described, including their ultimate concession that Peregrine’s RF CMOS approach was correct

Speaker Bio

Ronald Reedy was born on Long Island, New York in 1948. He was raised in Scottsdale, Arizona, where he received an appointment to US Naval Academy in Annapolis, MD, from which he graduated in 1969 with a BSEE. He then earned a MSEE degree from US Naval Postgraduate School in Monterey, CA, and was assigned to various posts in the US Navy. He ended his active duty assigned to Naval Electronics Laboratory in San Diego, CA, where he began a life-long R&D career in Silicon CMOS processing. In 1977, he launched what would become a 12-year R&D initiative which culminated in the improved Silicon-on-Sapphire (SOS) technology now known as Peregrine’s UltraCMOS® Technology. He was awarded a Ph.D. in EE & Applied Physics from the University of California at San Diego in 1983 and continued to manage the R&D team at the Naval Electronics Laboratory until departing to start Peregrine Semiconductor in 1990. It was in this role that the he started a long relationship with colleague and co-founder, Dr. Mark Burgener.

As founding CEO of Peregrine Semiconductor, Ron built foundry relationships which provided key manufacturing capabilities and enabled the company’s first commercial product successes. Building such relationships was imperative to Peregrine’s early endeavors because deploying a proprietary manufacturing process technology while operating in a fabless business model presented formidable challenges. During the subsequent 10 years, Ron and the start-up Peregrine navigated management changes, industry cycles and financial strains, and persevered.

Today, Ron serves as Peregrine’s Chief Technology Officer managing the company’s technology activities and Intellectual Properties. As co-inventor of UltraCMOS technology and with 35 years experience covering all aspects of semiconductors, including work beyond CMOS such as CCD devices, InP, integrated optoelectronics, fiber optic communications and photonic systems, Ron continues to contribute extensively to the semiconductor industry. He has earned dozens of patents and published or presented hundreds of technical articles, submissions and conference presentations. He is an IEEE member and consistently is invited to lecture at industry and university workshops. A tribute to his career is that he and co-founder Mark Burgener received the world-renowned IEEE Daniel E. Noble Award for Emerging Technologies in 2011. Ron and his wife, Robin, reside in San Diego, CA, and they, along with their children and grandchildren, enjoy the beauty of southern California.

Location Peregrine Semiconductor, Sorrento Valley, Building 3, 9450 Carroll Park Drive, San Diego, CA 92121
Directions

http://goo.gl/maps/RezBo

Agenda

5:30 - 6:30 PM:  Food and Networking

6:30 - 7:45 PM:  Presentation and Q & A

7:45 - 8:00 PM:  Networking

Cost Free , Free parking
RSVP

To register or cancel a previous registration, click here:  register

 

https://meetings.vtools.ieee.org/meeting_registration/register/21581

 

Questions:  For additional information contact

Upkar Dhaliwal PACE-P Chair,

upkar@ieee.org

 

  File Date Uploaded
PACE Peregrine oct30 Final.docx 10/25/13 06:49 PM
PACE Reedy Commercializing SOS_TG Final.pdf.pdf 02/08/14 06:42 PM



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